Solution provider

IEEE1588 & Sync E Timing Module

 
SPECIFICATION
Implementation compliant to IEEE 1588-2008 standard (PTPv2)
Support both Unicast/Multicast addressing mode
Support one-step and two-step clock
Support both P2P and E2E modes
Support frequency recovery over SyncE
Best Master Clock algorithm support
Support Transparent and Boundary clock modes
Powerful Servo algorithm and PDV filter compensate packet network impairment with G.8261
Configurable PTP Profiles
Support PTP performance statistics
Support PTP Management interface
Support configurable PTP profiles
Software Upgradeable
 
CLOCK INTERFACE
Support 12 single end or differential pair clock input
Support 2 single end and 4 differential pair clock output
Support two frame synchronous pulse with 8K/1PPS and 2K/1PPS respectively
Output frequency of 10MHz, G.703 2.048MHz/2.048Mbps and 1pps
Clock output quality meet G.823/G.824 PDH Sync Interface Jitter/Wander standard
Frequency accuracy better than ±15 ppb average
Holdover mode support with holdover accuracy defined by choice of external crystal oscillator
 
HIGH LIGHT FEATURES
- Hardware based TSU at PHY level with minimum software processing delay
- Software/Hardware based Clock Recovery algorithm to deliver the best quality clock
- Configuration as Master(Translator), Slave or Transparent modes
- Reference clock option of GPS 1pps and TOD for Master(Translator) mode