Solution provider
ALTERA Stratix V GX And Open CL Development Platform
Product Overview
Altera Stratix®V GX FPGA (5SGXA7N3F40I3)
· On board include Cyclone®V SX SOC(5CSXFC6C6U23C8N) with dual ARM processor
· On board JTAG header for FPGA programming
· Fast passive parallel (FPPx32) configuration via MAX10 CPLD and flash memory
GENERAL USER INPUT/OUTPUT
• 19 LEDs
• 3 push-buttons
• 7 GPIO connector
• 4 slide switches
• LCM Panel interface
ON-BOARD CLOCK
• 50MHz Oscillator
• Programmable oscillators for multi rate interface
MEMORY
• FLASH
• Four banks of 2Gbytes (4Gbytes option) of DDR3 SDRAM buses with 32-bit Data, totally 8Gbytes(16Gbytes option)
COMMUNICATION PORTS
• ON BOARD TWO 10G SFP+
• ONE GIGABIT ETHERNET (RJ45) FROM FPGA
• ONE GIGABIT ETHERNET (RJ45) FROM ARM
• PCI EXPRESS GEN3.0 (PCIE) X4 EDGE CONNECTOR
• PCI EXPRESS GEN3.0 (PCIE) X8 EDGE CONNECTOR (OPTION)
DAUGHTER BOARD
• FOUR 12G/6G/3G SDI INPUT PORT
• FOUR 12G/6G/3G SDI OUTPUT PORT
• HDMI 2.0 INPUT INTERFACE
• HDMI 2.0 OUTPUT INTERFACE
• FOUR MINISAS SFF8087(36PINS)
• TWO QSFP+ SUPPORT TOTALLY 8 PORT OF 10G
SYSTEM MONITOR AND CONTROL
• TEMPERATURE SENSOR
• FAN CONTROL
POWER
• INDUSTRIAL POWER CONNECTOR, 12V DC INPUT
MECHANICAL SPECIFICATION
- PCI Express standard height and half-length
SOFTWARE DRIVER AND OPENCL BSP
- Support Linux based driver and OpenCL BSP
- HPC BSP(Co-Processor) included with Card Purchase
- MAC BSP (Network Enabled)
- SDN Openflow enable
- PCIe driver for linux or windows
聯絡我們
8F, No. 85, Yanping S. Rd. Taipei, Taiwan
Taipei
10043
02-2388-6868
tinashih@gemstone.com.tw maxlin@gemstone.com.tw elie@gemstone.com.tw FAE:fae@gemstone.com.tw